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HSTL16918
Datasheet
General description
The HSTL16918 is a 9-bit to 18-bit D-type latch designed for 3.15 to 3.45 V VCC operation. The D inputs accept HSTL levels and the Q outputs provide LVTTL levels.
The HSTL16918 is particularly suitable for driving an address bus to two banks of memory. Each bank of nine outputs is controlled with its own latch-enable (LE) input.
Each of the nine D inputs is tied to the inputs of two D-type latches that provide true data (Q) at the outputs. While LE is LOW the Q outputs of the corresponding nine latches follow the D inputs. When LE is taken HIGH, the Q outputs are latched at the levels set up at the D inputs.
The HSTL16918 is characterized for operation from 0 to +70 Cel.
Features
- Inputs meet JEDEC HSTL Std. JESD 8-6, and outputs meet Level III specifications
- ESD classification testing is done to JEDEC Standard JESD22. Protection exceeds 2000 V to HBM per method A114.
- Latch-up testing is done to JEDEC Standard JESD78, which exceeds 100 mA.
- Packaged in 48-pin plastic thin shrink small outline package (TSSOP48)
Products/packages
| Type number | North American Type number | Ordering code (12NC) | Product status | Package | Packing | Marking | Chemical content | Leadfree conversion date |
|---|---|---|---|---|---|---|---|---|
| HSTL16918DGG | HSTL16918DGG | 9352 702 53512 | Volume production | SOT362-1
(TSSOP48) | Tube Dry Pack | Standard Marking | HSTL16918DGG
| week 12, 2005 |
| HSTL16918DGG | HSTL16918DGG-T | 9352 702 53518 | Volume production | SOT362-1
(TSSOP48) | Reel Dry Pack, SMD, 13" | Standard Marking | HSTL16918DGG
| week 12, 2005 |
Pricing/ordering/availability
| Type number | Ordering code(12NC) | Indicative price/unit($) | Region | Distributor | In stock | Order quantity | Inventory date | Buy online | Samples |
|---|---|---|---|---|---|---|---|---|---|
| HSTL16918DGG | 9352 702 53512 | 2.6600 | Order samples | ||||||
| HSTL16918DGG | 9352 702 53518 | 2.6600 | not available |
Design support
Support Documents
Parametrics/similar products
| Type number | Package | Supply voltage(V) | Application | Operating temp.(Cel) | Propagation Delay(ns) | Inputs | Outputs | Set-up time (DATA-CLK)(ns) | Hold time (CLK-DATA)(ns) |
|---|---|---|---|---|---|---|---|---|---|
| HSTL16918DGG | SOT362-1
(TSSOP48) | 3.3 | memory address latch | 0~+70 | 2.4 | 9 x HSTL | 18 x LVTTL | 2 | 1 |
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HSTL16918
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