TDA6650ATT; TDA6651ATT

General description

The TDA6650ATT; TDA6651ATT is a programmable 3-band mixer/oscillator and low phase noise PLL synthesizer intended for pure 3-band tuner concepts applied to hybrid (digital and analog) or digital-only terrestrial and cable TV reception.

The device includes three double balanced mixers for low, mid and high bands, three oscillators for the corresponding bands, a switchable IF amplifier, a wideband AGC detector and a low noise PLL synthesizer. Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling and to improve the adjacent channel rejection.

The IF amplifier is switchable in order to drive both symmetrical and asymmetrical outputs. When it is used as an asymmetrical amplifier, the IFOUTB pin needs to be connected to the supply voltage V_CCA .

Five open-drain PMOS ports are included on the IC. Two of them, BS1 and BS2, are also dedicated to the selection of the low, mid and high bands. PMOS port BS5 pin is shared with the ADC.

The AGC detector provides a control that can be used in a tuner to set the gain of the RF stage. Six AGC take-over points are available by software. Two programmable AGC time constants are available for search tuning and normal tuner operation.

The local oscillator signal is fed to the fractional-N divider. The divided frequency is compared to the comparison frequency into the fast phase detector which drives the charge pump. The loop amplifier is also on-chip, including the high-voltage transistor to drive directly the 33 V tuning voltage without the need to add an external transistor.

The comparison frequency is obtained from an on-chip crystal oscillator. The crystal frequency can be output to the XTOUT pin to drive the clock input of a digital demodulation IC.

Control data is entered via the I²C-bus; six serial bytes are required to address the device, select the Local Oscillator (LO) frequency, select the step frequency, program the output ports and set the charge pump current or enable or disable the crystal output buffer, select the AGC take-over point and time constant and/or select a specific test mode. A status byte concerning the AGC level detector and the ADC voltage can be read out on the SDA line during a read operation. During a read operation, the loop 'in-lock' flag, the power-on reset flag and the automatic loop bandwidth control flag are read.

The device has 4 programmable addresses. Each address can be selected by applying a specific voltage to pin AS, enabling the use of multiple devices in the same system.

The I²C-bus is fast mode compatible, except for the timing as described in the functional description and is compatible with 5 V, 3.3 V and 2.5 V microcontrollers depending on the voltage applied to pin BVS.

Features

• Single-chip 5 V mixer/oscillator and low phase noise PLL synthesizer for TV and VCR tuners, dedicated to hybrid (digital and analog) and pure digital applications for Japanese standards (NTSC and ISDB-T)
• Five possible step frequencies to cope with different digital terrestrial TV and analog TV standards
• Eight charge pump currents between 40 uA and 600 uA to reach the optimum phase noise performance over the bands
• I²C-bus protocol compatible with 2.5 V, 3.3 V and 5 V microcontrollers:
• Address + 5 data bytes transmission (I²C-bus write mode)
• Address + 1 status byte (I²C-bus read mode)
• Four independent I²C-bus addresses
• Five PMOS open-drain ports with 15 mA source capability for band switching and general purpose; one of these ports is combined with a 5-step ADC
• Wideband AGC detector for internal tuner AGC:
• Six programmable take-over points
• Two programmable time constants
• AGC flag
• In-lock flag
• Crystal frequency output buffer
• 33 V tuning voltage output
• Fractional-N programmable divider
• Balanced mixers with a common emitter input for the low band and for the mid band (each single input)
• Balanced mixer with a common base input for the high band (balanced input)
• 2-pin asymmetrical oscillator for the low band
• 2-pin symmetrical oscillator for the mid band
• 4-pin symmetrical oscillator for the high band
• Switched concept IF amplifier with both asymmetrical and symmetrical outputs to drive low impedance or SAW filters i.e. 500 Ohm/40 pF

Products/packages

Pricing/ordering/availability

Applications

For all applications, the recommendations given in the latest Application note AN10544 must be used.

Application summary

• Digital and analog terrestrial tuners (ISDB-T and NTSC Japan)
• Cable tuners (QAM)
• Digital TV sets
• Digital set-top boxes

Related applications
50-60 Hz CRT integrated DTV (TV210D)
PCI analog stereo TV receiver

Design support

Application Notes

AN10544_1; TDA6650/51(A)TT C1 and C3 - known limitations (24-Nov-06)

Support Documents

75015045; World News 14.2 (2005-05-25)

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